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pwm-ff ic ICE2AS01/s01g ice2bs01/s01g off-line smps current mode controller never stop thinking. power management & supply datasheet, version 2.1, 30 jun 2006
edition 2006-06-30 published by infineon technologies ag, st.-martin-strasse 53, d-81541 mnchen ? infineon technologies ag 1999. all rights reserved. attention please! the information herein is given to describe certain com ponents and shall not be considered as warranted charac- teristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warrant ies, including but not limited to warran ties of non-infringement, regarding circuits, descriptions and charts stated herein. infineon technologies is an approved cecc manufacturer. information for further information on technology, delivery terms and co nditions and prices please contact your nearest infi- neon technologies office in germany or our infineon tec hnologies representatives worldwide (see address list). warnings due to technical requirements components may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-support devices or system s with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that de vice or system. life support devices or systems are intended to be implanted in the hu man body, or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered. for questions on technology, delivery and prices please contact the infineon technologies offices in germany or the infineon technologies companies and representat ives worldwide: see our webpage at http:// www.infineon.com coolmos?, coolset? are trademarks of infineon technologies ag. ICE2AS01/s01g ice2bs01/s01g revision history: 2006-06-30 datasheet previous version: v2.0 page subjects (major changes since last revision) 3,5,15,23 update to pb-free package we listen to your comments any information within this document that y ou feel is wrong, unclear or missing at all? your feedback will help us to continuously improve the quality of this document. please send your proposal (including a reference to this document) to: mcdocu.comments@infineon.com
datasheet 3 30 jun 2006 type frequency package ICE2AS01 100khz pg-dip-8 ICE2AS01g 100khz pg-dso-8 ice2bs01 67khz pg-dip-8 ice2bs01g 67khz pg-dso-8 ICE2AS01/s01g ice2bs01/s01g p-dip-8-4 pg-dip-8 p -dso-8- 3 pg-dso-8 c soft start c vcc r start-up vcc - converter dc output + ICE2AS01(g) / ice2bs01(g) snubber power management protection unit soft-start control pwm controller current mode fb 85 ... 270 vac feedback feedback typical application low power standby precise low tolerance peak current limitation r sense isense gnd softs gate off-line smps current mode controller product highlights ? enhanced protect ion functions all with auto restart ? lowest standby power dissipation ? very accurate current limiting ? pb-free plating and rohs compliant features ? only few external components required ? input undervoltage lockout ? 67khz/100khz fixed switching frequency ? max duty cycle 72% ? low power standby mode to support ?blue angel? norm ? latched thermal shut down ? overload and open loop protection ? overvoltage protection during auto restart ? adjustable peak curr ent limitation via external resistor ? overall tolerance of current limiting < 5% ? internal leading edge blanking ? soft start ? soft gate driving for low emi description this stand alone controller provides several special enhancements to satisfy the needs for low power standby and protection features. in standby mode frequency reduction is used to lower the power consumption and provide a stable output voltage in this mode. the frequency reduction is limited to 20khz / 21.5 khz (typ.) to avoid audible noise. in case of failure modes like open loop, overvoltage or overload due to short circuit the device switches in auto restart mode which is controlled by the internal protection unit. by means of the internal precise peak current limitation the dime nsion of the transformer and the secondary diode can be lower which leads to more cost efficiency.
ICE2AS01/s01g ice2bs01/s01g table of contents page datasheet 4 30 jun 2006 preliminary data 1 pin configurati on and functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 1.1 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 1.2 pin functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 2 representative blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 3 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 3.1 power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 3.2 improved current mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 3.2.1 pwm-op . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3.2.2 pwm-comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3.3 soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3.4 oscillator and frequen cy reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 3.4.1 oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 3.4.2 frequency reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 3.5 current limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 3.5.1 leading edge blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 3.5.2 propagation delay com pensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.6 pwm-latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.7 driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.8 protection unit (auto restart mo de) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 3.8.1 overload & open loop with normal load . . . . . . . . . . . . . . . . . . . . . . . . .12 3.8.2 overvoltage due to open loop with no load . . . . . . . . . . . . . . . . . . . . . . .13 3.8.3 thermal shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 4.1 absolute maximum rating s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 4.2 operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 4.3 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4.3.1 supply section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4.3.2 internal voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4.3.3 control section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4.3.4 protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 4.3.5 current limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 4.3.6 driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 5 typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .19 6 outline dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
datasheet 5 30 jun 2006 preliminary data ICE2AS01/s01g ice2bs01/s01g 1 figure 1 pin configuration (top view) 1.2 pin functionality softs (soft start & auto restart control) this pin combines the function of soft start in case of start up and auto restart mode and the controlling of the auto restart mode in case of an error detection. fb (feedback) the information about the regulation is provided by the fb pin to the internal protection unit and to the internal pwm-comparator to control the duty cycle. isense (current sense) the current sense pin senses the voltage developed on the series resistor insert ed in the source of the external power switch. when isense reaches the internal threshold of the cu rrent limit comparator, the driver output is disabl ed. by this mean the over current detection is realized. furthermore the current information is provided for the pwm-comparator to realize the current mode. gate (driver output) the current and slew rate capability of this pin are suited to drive power mosfets. vcc (power supply) this pin is the positive supply of the ic. the operating range is between 8.5v and 21v. to provide overvoltage protection the driver gets disabled when the voltage becomes higher than 16.5v during start up phase. gnd (ground) this pin is the ground of the primary side of the smps. 1.1 pin configuration pin symbol function 1 n.c. not connected 2 softs soft start & auto restart control 3 fb regulation feedback 4 isense controller current sense input 5 gate driver output 6 vcc controller supply voltage 7 gnd controller ground 8 n.c. not connected 1 6 7 8 4 3 2 5 gnd softs fb isense n.c. vcc n.c. gate package pg-dip-8 g-package pg-dso-8 1 pin configuration and functionality
ICE2AS01/s01g ice2bs01/s01g representative blockdiagram datasheet 6 30 jun 2006 2 representative blockdiagram figure 2 thermal shutdown t j >140c internal bias voltage reference 6.5v 4.8v leading edge blanking 200ns undervoltage lockout oscillator duty cycle max current-limit comparator x3.65 soft-start comparator current limiting pwm op improved current mode soft start 13.5v 8.5v 6.5v c2 c1 16.5v 4.0v r fb 6.5v protection unit power-down reset power-up reset power management c soft-start c vcc r start-up 85 ... 270 vac c line vcc gnd + - converter dc output v out ICE2AS01(g) / ice2bs01(g) optocoupler snubber spike blanking 5 s pwm comparator r sq q error-latch c4 5.3v c3 4.8v r soft-start gate driver g3 g2 g1 g4 softs 5.3v t1 v csth propagation-delay compensation r s q q pwm-latch 0.72 clock u fb f osc f norm f standby standby unit fb 4.0v r sense gate isense 0.8v c5 0.3v 5.6v 10k ? d1 frequency in normal mode f norm : ice2bs01(g) ICE2AS01(g) 67khz 100khz frequency in standby mode f standby : 20khz 21.5khz
datasheet 7 30 jun 2006 preliminary data ICE2AS01/s01g ice2bs01/s01g functional description 3 functional description 3.1 power management figure 3 power management the undervoltage lockout monitors the external supply voltage v vcc . in case the ic is inactive the current consumption is max. 55a. when the smps is plugged to the main line the current through r start-up charges the external capacitor c vcc . when v vcc exceeds the on-threshold v ccon =13.5v the internal bias circuit and the voltage reference are switched on. after it the internal bandgap generates a reference voltage v ref =6.5v to supply the internal circuits. to avoid uncontrolled ringing at switch-on a hysteresis is implemented which means that switch-off is only after active mode when vcc falls below 8.5v. in case of switch-on a power up reset is done by reseting the internal error-latch in the protection unit. when v vcc falls below the off-threshold v ccoff =8.5v the internal reference is switched off and the power down reset let t1 discharging the soft-start capacitor c soft-start at pin softs. thus it is ensured that at every switch-on the voltage ramp at pin softs starts at zero. 3.2 improved current mode figure 4 current mode current mode means that the duty cycle is controlled by the slope of the primary current. this is done by comparison the fb signal with the amplified current sense signal. figure 5 pulse width modulation in case the amplified current sense signal exceeds the fb signal the on-time t on of the driver is finished by reseting the pwm-latch (see figure 5). internal bias voltage reference 6.5v 4.8v undervoltage lockout 13.5v 8.5v power-down reset power-up reset power management 5.3v 4.0v t1 pwm-latch r s q q error-latch softs 6.5v error-detection vcc main line (100v-380v) primary winding soft-start comparator c vcc r soft-start r start-up c soft-start x3.65 pwm op improved current mode 0.8v pwm comparator pwm-latch isense fb r s q q driver soft-start comparator t fb amplified current signal t on t 0.8v driver
datasheet 8 30 jun 2006 preliminary data ICE2AS01/s01g ice2bs01/s01g functional description the primary current is sensed by the series resistor r sense inserted in the source of the external power switch. by means of current mode the regulation of the secondary voltage is insensitive on line variations. line variation causes variation of the increasing current slope which controls the duty cycle. the external r sense allows an individual adjustment of the maximum source current of the external power switch. figure 6 improved current mode to improve the current mode during light load conditions the amplified current ramp of the pwm-op is superimposed on a voltage ramp, which is built by the switch t 2 , the voltage source v 1 and the 1st order low pass filter composed of r 1 and c 1 (see figure 6, figure 7). every time the o scillator shuts down for max. duty cycle limitation the switch t2 is closed by v osc . when the oscillator triggers the gate driver t2 is opened so that the voltage ramp can start (see figure 7). in case of light load the amplified current ramp is to small to ensure a stable regulation. in that case the voltage ramp is a well defined signal for the comparison with the fb-signal. the duty cycle is then controlled by the slope of the voltage ramp. by means of the c5 comparator the gate driver is switched-off until the voltage ramp exceeds 0.3v. it allows the duty cycle to be reduced continuously till 0% by decreasing v fb below that threshold. figure 7 light load conditions 3.2.1 pwm-op the input of the pwm-op is applied over the internal leading edge blanking to th e external sense resistor r sense connected to pin isense. r sense converts the source current into a sense voltage. the sense voltage is amplified with a gain of 3.65 by pwm op. the output of the pwm-op is connected to the voltage source v1. the voltage ramp with the superimposed amplified current signal is fed into the positive inputs of the pwm- comparator, c5 and the soft-start-comparator. 3.2.2 pwm-comparator the pwm-comparator compares the sensed current signal of the external power switch with the feedback signal v fb (see figure 8). v fb is created by an external optocoupler or external tran sistor in combination with the internal pullup resistor r fb and provides the load information of the feedback circuitry. when the amplified current signal of the external power switch exceeds the signal v fb the pwm-comparator switches off the gate driver. x3.65 pwm op 0.8v 10k ? oscillator pwm comparator 20pf t 2 r 1 c 1 fb pwm-latch v 1 c5 0.3v gate driver voltage ramp v osc soft-start comparator t t v osc 0.8v fb gate driver voltage ramp t max. duty cycle 0.3v
datasheet 9 30 jun 2006 preliminary data ICE2AS01/s01g ice2bs01/s01g functional description figure 8 pwm controlling 3.3 soft-start figure 9 soft-start phase the soft-start is realized by the internal pullup resistor r soft-start and the external capacitor c soft-start (see figure 2). the soft-start voltage v softs is generated by charging the external capacitor c soft-start by the internal pullup resistor r soft-start . the soft-start-comparator compares the voltage at pi n softs at the negative input with the ramp signal of the pwm-op at the positive input. when soft-start voltage v softs is less than feedback voltage v fb the soft-start-comparator limits the pulse width by reseting the pwm-latch (see figure 9). in addition to start-up, so ft-start is also activated at each restart attempt during auto restart. by means of the above mentioned c soft-start the soft-start can be defined by the user. the soft-start is finished when v softs exceeds 5.3v. at that time the protection unit is activated by comparator c4 and senses the fb by comparator c3 wether the voltage is below 4.8v which means that the voltage on the secondary side of the smps is settled. the internal zener diode at softs with breakthrough voltage of 5.6v is to prevent the internal circuit from saturation (see figure 10). figure 10 activation of protection unit the start-up time t start-up within the converter output voltage v out is settled must be shorter than the soft- start phase t soft-start (see figure 11). by means of soft-start there is an effective minimization of current a nd voltage stresses on the external power switch, the clamp circuit and the output overshoot and prevents satu ration of the transformer during start-up. x3.65 pwm op improved current mode pwm comparator isense soft-start comparator 6.5v pwm-latch 0.8v fb optocoupler r fb t 5.3v v softs gate driver t t soft-start 5.6v 6.5v r fb 6.5v power-up reset c4 5.3v c3 4.8v r soft-start fb r s q q error-latch r s q q pwm-latch g2 clock gate driver 5.6v softs 69 , 1 = ? ? ? start soft start soft start soft r t c
datasheet 10 30 jun 2006 preliminary data ICE2AS01/s01g ice2bs01/s01g functional description figure 11 start up phase 3.4 oscillator and frequency reduction 3.4.1 oscillator the oscillator generates a frequency f switch = 100khz. a resistor, a capacitor and a current source and current sink which determine the fr equency are integrated. the charging and discharging cu rrent of the implemented oscillator capacitor are intern ally trimmed, in order to achieve a very accurate switching frequency. the ratio of controlled charge to discharge current is adjusted to reach a max. duty cycle limitation of d max =0.72. 3.4.2 frequency reduction the frequency of the oscillator is depending on the voltage at pin fb. the dependence is shown in figure 12. this feature allows a power supply to operate at lower frequency at light loads thus lowering the switching losses while maintaining good cross regulation performance and low output ripple. in case of low power the power consumption of the whole smps can now be reduced very effective. the minimal reachable frequency is limited to 20khz / 21.5 khz to avoid audible noise in any case. figure 12 frequency dependence 3.5 current limiting there is a cycle by cycle current limiting realised by the current-limit comparator to provide an overcurrent detection. the source current of the external power switch is sensed via an external sense resistor r sense . by means of r sense the source current is transformed to a sense voltage v sense . when the voltage v sense exceeds the internal threshold voltage v csth the current-limit-comparator immediately turns off the gate drive. to prevent t he current limiting from distortions caused by leading edge spikes a leading edge blanking is integrated at the current sense. furthermore a propagation delay compensation is added to support the immediate shut down of the power switch in case of overcurrent. 3.5.1 leading edge blanking figure 13 leading edge blanking each time when the external power switch is switched on a leading spike is generated due to the primary-side capacitances and secondary-side rectifier reverse t t v softs t 5.3v 4.8v t soft-start v out v fb v out t start-up f standby f norm 1,0 1,1 1,2 1,3 1,4 1,5 1,6 1,7 1,8 1,9 2 fb v v khz osc f f norm : ice2bs01(g) ICE2AS01(g) 67khz 100khz f standby : 20khz 21.5khz t v sense v csth t leb = 220ns
datasheet 11 30 jun 2006 preliminary data ICE2AS01/s01g ice2bs01/s01g functional description recovery time. to avoid a pr emature termination of the switching pulse this spike is blanked out with a time constant of t leb = 220ns. during that time the output of the current-limit comparator cannot switch off the gate drive. 3.5.2 propagation delay compensation in case of overcurrent detection the shut down of the external power switch is delayed due to the propagation delay of the circuit. this delay causes an overshoot of the peak current i peak which depends on the ratio of di/dt of the peak current (see figure 14). . figure 14 current limiting the overshoot of signal2 is bigger than of signal1 due to the steeper rising waveform. a propagation delay compens ation is integrated to bound the overshoot dependent on di/dt of the rising primary current. that means the propagation delay time between exceeding the current sense threshold v csth and the switch off of the external power switch is compensated over temperat ure within a range of at least . so current limiting is now capable in a very accurate way (see figure 16). e.g. i peak = 0.5a with r sense = 2. without propagation delay compensation the current sense threshold is set to a static voltage level v csth =1v. a current ramp of di/dt = 0.4a/s, that means dv sense /dt = 0.8v/s, and a propagation delay time of i.e. t propagation delay =180ns leads then to an i peak overshoot of 14.4%. by means of propagation delay compensation the overshoot is only about 2% (see figure 15). the propagation delay compensation is done by means of a dynamic threshold voltage v csth (see figure 15). in case of a steeper slope the switch off of the driver is earlier to compensate the delay. figure 15 dynamic voltage threshold v csth figure 16 overcurrent shutdown 3.6 pwm-latch the oscillator clock output applies a set pulse to the pwm-latch when initiating the external power switch conduction. after setting the pwm-latch can be reset by the pwm-op, the soft-start-comparator, the current-limit-comparator, comparator c3 or the error-latch of the protection unit. in case of reseting the driver is shut down immediately. 3.7 driver the driver is a fast totem pole gate drive, which is designed to avoid cross condu ction currents and which is equipped with a zener diode z1 (see figure 17) in order to improve the control of the gate attached power t i sense i limit t propagation delay i overshoot1 i peak1 signal1 signal2 i overshoot2 i peak2 dt dv dt di r sense peak sense 1 0 t v csth v osc signal1 signal2 v sense propagation delay max. duty cycle off time t 0,9 0,95 1 1,05 1,1 1,15 1,2 1,25 1,3 0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2 with compensation without compensation d t dv sense s v sense v v
datasheet 12 30 jun 2006 preliminary data ICE2AS01/s01g ice2bs01/s01g functional description transistors as well as to protect them against undesirable gate overvoltages. figure 17 gate driver at voltages below the under voltage lockout threshold v vccoff the gate drive is active low. the driver-stage is optimized to minimize emi and to provide high circuit efficiency. this is done by reducing the switch on slope when reaching the external power switch threshold. this is achieved by a slope control of the rising edge at the driver ?s output (see figure 18). figure 18 gate rising slope thus the leading switch on spike is minimized. when the external power switch is switch ed off, the falling shape of the driver is slowed down when reaching 2v to prevent an overshoot belo w ground. furthermore the driver circuit is designed to eliminate cross conduction of the output stage. 3.8 protection unit (auto restart mode) an overload, open loop and overvoltage detection is integrated within the protection unit. these three failure modes are latched by an error-latch. additional thermal shutdown is latched by the error-latch. in case of those failure modes the error-latch is set after a blanking time of 5s and the external power switch is shut down. that blanking prevents the error-latch from distortions caused by spikes during operation mode. 3.8.1 overload & open loop with normal load figure 19 auto restart mode figure 19 shows the auto restart mode in case of overload or open loop with normal load. the detection of open loop or overload is provided by the comparator c3, c4 and the and-gate g2 (see figure20). z1 vcc 1 pwm-latch gate t v gate 5v c load = 1nf ca. t = 130ns overload & open loop/normal load fb t 4.8v 5.3v softs 5s blanking failure detection soft-start phase vcc 13.5v 8.5v t driver t t restart t burst1 t
datasheet 13 30 jun 2006 preliminary data ICE2AS01/s01g ice2bs01/s01g functional description figure 20 fb-detection the detection is activated by c4 when the voltage at pin softs exceeds 5.3v. till this time the ic operates in the soft-start phase. after this phase the comparator c3 can set the error-latch in case of open loop or overload which leads the feedback voltage v fb to exceed the threshold of 4.8v. after latching vcc decreases till 8.5v and inacti vates the ic. at this time the external soft-start capacitor is discharged by the internal transistor t1 du e to power down reset. when the ic is inactive vcc increases till v ccon = 13.5v by charging the capacitor c vcc by means of the start-up resistor r start-up . then the error-latch is reset by power up reset and the external soft-start capacitor c soft-start is charged by the internal pullup resistor r soft- start . during the soft-start phase which ends when the voltage at pin softs exceeds 5.3v the detection of overload and open loop by c3 and g2 is inactive. in this way the start up phase is not detected as an overload. but the soft-start phase must be finished within the start up phase to force the voltage at pin fb below the failure detection threshold of 4.8v. 3.8.2 overvoltage due to open loop with no load figure 21 auto restart mode figure 21 shows the auto restart mode for open loop and no load condition. in case of this failure mode the converter output voltage increases and also vcc. an additional protection by the comparators c1, c2 and the and-gate g1 is implemented to consider this failure mode (see figure 22). r soft-start 6.5v c soft-start c4 5.3v c3 4.8v g2 t1 error-latch power up reset r fb 6.5v fb softs open loop & no load condition t driver 13.5v 16.5v fb 4.8v 5s blanking failure detection 5.3v softs 4.0v overvoltage detection phase soft-start phase t t t restart t burst2 vcc 8.5v overvoltage detection t
datasheet 14 30 jun 2006 preliminary data ICE2AS01/s01g ice2bs01/s01g functional description figure 22 overvoltage detection the overvoltage detection is provided by comparator c1 only in the first time during the auto restart mode till the soft-start voltage exceeds the threshold of the comparator c2 at 4.0v and the voltage at pin fb is above 4.8v. when vcc exceeds 16.5v during the overvoltage detection phase c1 can set the error-latch and the burst phase during auto restart mode is finished earlier. in that case t burst2 is shorter than t soft- start . by means of c2 the normal operation mode is prevented from overvoltage detection due to varying of vcc concerning the regulation of the converter output. when the voltage v softs is above 4.0v the overvoltage detection by c1 is deactivated. 3.8.3 thermal shut down thermal shut down is latched by the error-latch when junction temperature t j of the pwm controller is exceeding an internal threshold of 140c. in that case the ic switches in auto restart mode. note: all the values which are mentioned in the functional description are typical. please refer to electrical characteristics for min/max limit values. 6.5v c soft-start vcc r soft-start c1 16.5v c2 4.0v t1 softs g1 error latch power up reset
ICE2AS01/s01g ice2bs01/s01g electrical characteristics datasheet 15 30 jun 2006 4 electrical characteristics 4.1 absolute maximum ratings note: absolute maximum ratings are defined as ratings , which when being exceeded may lead to destruction of the integrated circuit. for the same reason make su re, that any capacitor that will be connected to pin 6 ( v cc) is discharged before assembling the application circuit. 4.2 operating range note: within the operati ng range the ic operates as described in the functional description. parameter symbol limit values unit remarks min. max. v cc supply voltage v cc -0.3 22 v fb voltage v fb -0.3 6.5 v softs voltage v softs -0.3 6.5 v isense i sense -0.3 3 v junction temperature t j -40 150 c controller & coolmos storage temperature t s -50 150 c thermal resistance junction-ambient r thja - 90 k/w pg-dip-8 thermal resistance junction-ambient r thja - 185 k/w pg-dso-8 esd capability 1) 1) equivalent to discharging a 100pf capacitor through a 1.5 k ? series resistor v esd - 2 kv human body model parameter symbol limit values unit remarks min. max. v cc supply voltage v cc v ccoff 21 v junction temperature of controller t jcon -25 130 c limited due to thermal shut down of controller
ICE2AS01/s01g ice2bs01/s01g electrical characteristics datasheet 16 30 jun 2006 4.3 characteristics note: the electrical characteristics involve the spread of values guaranteed within the specified supply voltage and junction temperature range t j from ? 25 c to 125 c.typical values represent the median values, which are related to 25c. if not ot herwise stated, a supply voltage of v cc = 15 v is assumed. 4.3.1 supply section 4.3.2 internal voltage reference 4.3.3 control section parameter symbol limit va lues unit test condition min. typ. max. start up current i vcc1 -2755av cc =v ccon -0.1v supply current with inactive gate i vcc2 -5.37mav softs = 0 i fb = 0 supply current with active gate ICE2AS01/g i vcc3 -6.58mav softs = 5v i fb = 0 c gate = 1nf supply current with active gate ice2bs01/g i vcc3 -67.5mav softs = 5v i fb = 0 c gate = 1nf vcc turn-on threshold vcc turn-off threshold vcc turn-on/off hysteresis v ccon v ccoff v cchy 13 - 4.5 13.5 8.5 5 14 - 5.5 v v v parameter symbol limit values unit test condition min. typ. max. trimmed reference voltage v ref 6.37 6.50 6.63 v measured at pin fb parameter symbol limit values unit test condition min. typ. max. oscillator frequency ICE2AS01/g f osc1 93 100 107 khz v fb = 4v oscillator frequency ice2bs01/g f osc3 62 67 72 khz v fb = 4v reduced osc. frequency ICE2AS01/g f osc2 -21.5-khzv fb = 1v reduced osc. frequency ICE2AS01/g f osc4 -20-khzv fb = 1v
ICE2AS01/s01g ice2bs01/s01g electrical characteristics datasheet 17 30 jun 2006 4.3.4 protection unit 4.3.5 current limiting frequency ratio f osc1 /f osc2 ICE2AS01/g 4.5 4.65 4.9 frequency ratio f osc3 /f osc4 ice2bs01/g 3.18 3.35 3.53 max duty cycle d max 0.67 0.72 0.77 min duty cycle d min 0- - v fb < 0v pwm-op gain a v 3.45 3.65 3.85 max. level of voltage ramp v max-ramp -0.85-v v fb operating range min level v fbmin 0.3 - - v v fb operating range max level v fbmax --4.6v feedback resistance r fb 3.0 3.7 4.9 k ? soft-start resistance r soft-start 42 50 62 k ? parameter symbol limit values unit test condition min. typ. max. over load & open loop detection limit v fb2 4.65 4.8 4.95 v v softs > 5.5v activation limit of overload & open loop detection v softs1 5.15 5.3 5.46 v v fb > 5v deactivation limit of overvoltage detection v softs2 3.88 4.0 4.12 v v fb > 5v v cc > 17.5v overvoltage detection limit v vcc1 16 16.5 17.2 v v softs < 3.8v v fb > 5v latched thermal shutdown t jsd 130 140 150 c guaranteed by design spike blanking t spike -5-s parameter symbol limit values unit test condition min. typ. max. peak current limitation (incl. propagation delay time) (see figure 7) v csth 0.95 1.00 1.05 v dv sense / dt = 0.6v/ s leading edge blanking t leb -220-ns
ICE2AS01/s01g ice2bs01/s01g electrical characteristics datasheet 18 30 jun 2006 4.3.6 driver section parameter symbol limit values unit test condition min. typ. max. gate low voltage v gate -0.951.2vv vcc = 5 v i gate = 5 ma -1.01.5vv vcc = 5 v i gate = 20 ma -0.88-vi gate = 0 a -1.62.2vi gate = 50 ma -0.2 0.2 - v i gate = -50 ma gate high voltage v gate -11.5-vv vcc = 20v c l = 4.7nf -10-vv vcc = 11v c l = 4.7nf -7.5-vv vcc = v vccoff + 0.2v c l = 4.7nf gate rise time t r -160-nsv gate = 2v...9v 1) c l = 4.7nf 1) transient reference value gate fall time t f -65-nsv gate = 9v...2v 1) c l = 4.7nf gate current, peak, rising edge i gate -0.5 - - a c l = 4.7nf 2) 2) design characteristics (not meant for production testing) gate current, peak, falling edge i gate --0.7ac l = 4.7nf 2)
datasheet 19 30 jun 2006 preliminary data ICE2AS01/s01g ice2bs01/s01g typical performanc e characteristics 5 typical performance characteristics figure 23 start up current i vcc1 vs. t j figure 24 supply current i vcc2 vs. t j figure 25 supply current i vcc3 vs. t j figure 26 vcc turn-on threshold v vccon vs. t j figure 27 vcc turn-off threshold v vccoff vs. t j figure 28 vcc turn-on/off hysteresis v vcchy vs. t j junction temperature [c] start up current i vcc1 [a] pi-001-190101 22 24 26 28 30 32 34 36 38 40 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 junction temperature [c] supply current i vcc2 [ma] pi-003-190101 4,5 4,8 5,1 5,4 5,7 6,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 junction temperature [c] vcc turn-on threshold v ccon [v] pi-004-190101 13,42 13,44 13,46 13,48 13,50 13,52 13,54 13,56 13,58 -25-15-5 5 152535455565758595105115125 junction temperature [c] vcc turn-off threshold v vccoff [v] pi-005-190101 8,40 8,43 8,46 8,49 8,52 8,55 8,58 8,61 8,64 8,67 -25-15-5 5 152535455565758595105115125 junction temperature [c] vcc turn-on/off hysteresis v cchy [v] pi-006-190101 4,83 4,86 4,89 4,92 4,95 4,98 5,01 5,04 5,07 5,10 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
datasheet 20 30 jun 2006 preliminary data ICE2AS01/s01g ice2bs01/s01g typical performance characteristics figure 29 trimmed reference v ref vs. t j figure 30 oscillator frequency f osc1 vs. t j figure 31 oscillator frequency f osc3 vs. t j figure 32 reduced osc. frequency f osc2 vs. t j figure 33 reduced osc. frequency f osc4 vs. t j figure 34 frequency ratio f osc1 / f osc2 vs. t j junction temperature [c] trimmed reference voltage v ref [v] pi-007-190101 6,45 6,46 6,47 6,48 6,49 6,50 6,51 6,52 6,53 6,54 6,55 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
datasheet 21 30 jun 2006 preliminary data ICE2AS01/s01g ice2bs01/s01g typical performance characteristics figure 35 frequency ratio f osc3 / f osc4 vs. t j figure 36 max. duty cycle vs. t j figure 37 pwm-op gain a v vs. t j figure 38 feedback resistance r fb vs. t j figure 39 soft-start resistance r soft-start vs. t j figure 40 detection limit v fb2 vs. t j junction temperature [c] max. duty cycle pi-011-190101 0,710 0,712 0,714 0,716 0,718 0,720 0,722 0,724 0,726 0,728 0,730 -25-15-5 5 152535455565758595105115125 junction temperature [c] pwm-op gain a v pi-012-190101 3,60 3,61 3,62 3,63 3,64 3,65 3,66 3,67 3,68 3,69 3,70 -25-15-5 5 152535455565758595105115125 junction temperature [c] feedback resistance r fb [kohm] pi-013-190101 3,50 3,55 3,60 3,65 3,70 3,75 3,80 3,85 3,90 3,95 4,00 -25-15-5 5 152535455565758595105115125 junction temperature [c] soft-start resistance r soft-start [kohm] pi-014-190101 40 42 44 46 48 50 52 54 56 58 -25-15-5 5 152535455565758595105115125 junction temperature [c] detection limit v fb2 [v] pi-015-190101 4,75 4,76 4,77 4,78 4,79 4,80 4,81 4,82 4,83 4,84 4,85 -25-15-5 5 152535455565758595105115125
datasheet 22 30 jun 2006 preliminary data ICE2AS01/s01g ice2bs01/s01g typical performance characteristics figure 41 detection limit v soft-start1 vs. t j figure 42 detection limit v soft-start2 vs. t j figure 43 overvoltage detection limit v vcc1 vs. t j figure 44 peak current limitation v csth vs. t j figure 45 leading edge blanking v vcc1 vs. t j junction temperature [c] detection limit v soft-start1 [v] pi-016-190101 5,25 5,26 5,27 5,28 5,29 5,30 5,31 5,32 5,33 5,34 5,35 -25-15-5 5 152535455565758595105115125 junction temperature [c] detection limit v soft-start2 [v] pi-017-190101 3,95 3,96 3,97 3,98 3,99 4,00 4,01 4,02 4,03 4,04 4,05 -25-15-5 5 152535455565758595105115125 junction temperature [c] overvoltage detection limit v vcc1 [v] pi-018-190101 16,20 16,25 16,30 16,35 16,40 16,45 16,50 16,55 16,60 16,65 16,70 16,75 16,80 -25-15-5 5 152535455565758595105115125 junction temperature [c] peak current limitation v csth [v] pi-019-190101 0,990 0,992 0,994 0,996 0,998 1,000 1,002 1,004 1,006 1,008 1,010 -25-15-5 5 152535455565758595105115125 junction temperature [c] leading edge blanking t leb [ns] pi-020-190101 180 190 200 210 220 230 240 250 260 270 280 -25-15-5 5 152535455565758595105115125
ICE2AS01/s01g ice2bs01/s01g outline dimension datasheet 23 30 jun 2006 6 outline dimension figure 46 figure 47 dimensions in mm pg-dso-8 (plastic dual small outline) pg-dip-8 (plastic dual in-line package)
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